1. Field of the Invention
This invention relates to a shift register, and more particularly to a static shift register having a simple configuration as well as a bilateral characteristic.
2. Description of the Related Art
Flat panel display devices, such as a liquid crystal displays (LCD), electro-luminescence (EL) display devices, and plasma display panels (PDP), etc. have replaced a cathode ray tube (CRT) in many applications.
The LCD devices control the transmittance of light input from a light source using the dielectric anisotropy of the liquid crystal in accordance with an electric field, to display a picture. The EL display device, by contrast, emits light from a phosphorescent material using a re-combination of electrons with holes to display a picture.
Such LCD and EL display devices use a thin film transistor as a switching device for each picture element in order to provide an active matrix. The thin film transistor typically uses amorphous silicon or polycrystalline silicon as a semiconductor layer.
The amorphous silicon thin film transistor has an advantage of a stable characteristic according to the high uniformity of amorphous silicon film, but has a drawback of low electric charge mobility. This allows an amorphous silicon thin film transistor to be unsuitable for a high-resolution display device due to its low response time. It has a further disadvantage of high manufacturing cost because separately manufactured driving circuits requiring a high-speed response must be attached onto the display panel.
On the other hand, the polycrystalline silicon thin film transistor is suitable for use in a high-resolution display device because of its high electric charge mobility, and has an advantage of a lower manufacturing cost because driving circuits can be built on a display panel. Accordingly, LCD and EL display devices employing a polycrystalline silicon thin film transistor have been developed.
FIG. 1 schematically illustrates a configuration of a conventional liquid crystal display panel employing a polycrystalline silicon thin film transistor.
Referring to FIG. 1, the conventional liquid crystal display panel 10 includes a pixel matrix 16, a data driver 12 for driving data lines DL of the pixel matrix 16, and a gate driver 14 for driving gate lines GL of the pixel matrix 16.
The pixel matrix 16 has liquid crystal cells LC defined at crossings of the gate lines GL and the data lines DL and arranged in a matrix type, to display a picture. Each liquid crystal cell LC is a switching device connected to each crossing gate lines GL and the data lines DL and includes a thin film transistor (TFT) employing polycrystalline silicon. Because the thin film transistor TFT uses polycrystalline silicon having 100 times faster electric charge mobility than amorphous silicon, the liquid crystal cells LC are driven in a point-sequence system. The thin film transistor TFT responds to a scanning pulse from the gate line GL to charge a video signal from the data line DL, that is, a pixel signal into the liquid crystal cell LC. Thus, the liquid crystal cell LC controls a light transmittance in accordance with a charged pixel signal.
The gate driver 14 shifts a start pulse input from an external timing controller (not shown) to generate a shift pulse, and makes a level shifting of the shift pulse to apply it to the gate line GL as a scanning pulse. To this end, the gate driver 14 includes a shift register for shifting the start pulse and a level shifter for making a level shifting of the shift pulse from the shift register in order to apply it to the gate line GL as a scanning pulse.
The data driver 12 converts pixel data input from an external timing controller (not shown) into an analog pixel signal to be applied to the data line DL. To this end, the data driver 12 includes a shift register for applying a sequential sampling signal, a latch part for latching an input pixel data in response to the sampling signal and outputting the latched pixel data, and a digital-to-analog converter for converting a digital pixel data from the latch part into an analog pixel signal.
The gate driver 14 and the data driver 12 employ a shift register having a circuit configuration simpler than a decoder system for the purpose of generating a sequential shift pulse. As shown in FIG. 2, the shift register is comprised of a plurality of stages ST1 to STn connected, in cascade, to a start pulse (SP) input line. The plurality of stages ST1 to STn sequentially shift the start pulse SP in response to a clock signal C to generate output signals SO1 to Son. In this case, each of the second to nth stages ST2 to STn receives a pre-stage output signal as a start pulse to shift it. Thus, the shift registers generate output signals SO1 to Son such that the start pulse is sequentially shifted.
Such a shift register is largely classified into a dynamic shift register and a static shift register. The dynamic shift register has characteristics including a small number of TFT's per stage and a simple structure, but has drawbacks of a narrow frequency range and relatively large power consumption. On the other hand, the static shift register requires a large number of TFT's per stage, but has such characteristics that it can be used for a wide range of frequency bands and has improved power consumption.
It is important to provide circuitry configured with as small a number of TFT's as possible without deterioration in a special function in designing a shift register that can be built on to the liquid crystal display panel. However, the dynamic shift register has a problem in that it has a relatively poor response in the high frequency range and has relatively poor power consumption characteristics. In particular, it can malfunction due to the device characteristic of the polycrystalline silicon TFT having a relatively large leakage current.